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dc.contributor.authorAhmed, Hafiz
dc.contributor.authorBenbouzid, Mohamed El Hachemi
dc.date.accessioned2020-01-27T08:30:03Z
dc.date.available2020-01-27T08:30:03Z
dc.date.issued2019
dc.identifier.citationAdvances in electrical and electronic engineering. 2019, vol. 17, no. 4, p. 405 - 412 : ill.cs
dc.identifier.issn1336-1376
dc.identifier.issn1804-3119
dc.identifier.urihttp://hdl.handle.net/10084/139109
dc.description.abstractSecond-Order Generalized Integrator –Frequency-Locked Loop (SOGI-FLL) is a popular technique available in the grid synchronization literature. This technique uses gain normalization in the frequency locked-loop. This increases the computational complex-ity. In this paper, we propose an alternative imple-mentation to reduce the computational complexity of the SOGI-FLL. The proposed implementation modifies mainly the frequency locked-loop part and requires normalized voltage measurement. dSPACE 1104 board-based hardware implementation shows that the proposed implementation executes 20 % faster than the standard implementation. This could be very beneficial for high switching frequency application e.g. ≥ 1 MHz. In ad-dition to the nominal frequency case, multiresonant implementation is also proposed to tackle grid harmonics using a simpler harmonic decoupling network. Small signal dynamical modeling and tuning are performed for both implementations. Dynamical equivalence is also established between the two implementations. Experimental comparative analysis demonstrates similar or better performance (depending on test scenarios) with respect to the standard implementation of the SOGI-FLLcs
dc.language.isoencs
dc.publisherVysoká škola báňská - Technická univerzita Ostravacs
dc.relation.ispartofseriesAdvances in electrical and electronic engineeringcs
dc.relation.urihttp://dx.doi.org/10.15598/aeee.v17i4.3540cs
dc.rights© Vysoká škola báňská - Technická univerzita Ostrava
dc.rightsAttribution-NoDerivatives 4.0 International*
dc.rights.urihttp://creativecommons.org/licenses/by-nd/4.0/*
dc.subjectfrequency estimationcs
dc.subjectFrequency Locked-Loopcs
dc.subjectphase estimationcs
dc.subjectSecond Order Generalized In-tegratorcs
dc.titleSimplified Second-Order Generalized Integrator - Frequency-Locked Loopcs
dc.typearticlecs
dc.identifier.doi10.15598/aeee.v17i4.3540
dc.rights.accessopenAccesscs
dc.type.versionpublishedVersioncs
dc.type.statusPeer-reviewedcs


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